Adder (electronics)
In electronics, an adder is a device which will perform the addition, S, of two numbers. In computing the adder is part of the ALU, and some ALUs contain multiple adders. Although adders can be constructed for many numerical representations, such as BCD or excess-3, the most adders operate on binary numbers. Binary devices will be the focus of this article.
For single bit adders, there are two general types. A half adder has two inputs, generally labeled A and B, and two outputs, the sum S and carry output Co. S is the two-bit xor of A and B, and Co is the two-bit and of A and B. The other type of single bit adder is the full adder which is like a half adder, but takes an additional input carry Ci. A full adder can be constructed from two half adders by taking connecting A and B to the input of one half adder, connecting the sum from that to an input to the second adder, connecting Ci to the other input and or the two carry outputs. equivilant, S could be made the three-bit xor of A, B, and Ci and Co could be made the three-bit majority function of A, B, and Ci.
There are many advantages to having an input carry on an adder. The obvious advantage is that you can chain several adders together to get an adder that supports larger numbers. Connecting the output carry of one adder to the input carry of another adder creates what is known as a ripple carry adder.
Another advantage of the input carry is that if you are using two's complement to represent signed integers, you can easily create a subtractor by inverting one of the input numbers and setting the adder's input carry to one.
There are also several types of multi-bit adders. The ripple carry adder, described above, is the simplest type, as well as the slowest, since it requires changes to propagate through every full adder in the worst case. Other types of multi-bit adders work by creating Propagate and Generate signals (P and G) for each bit position, based on whether a carry is propagated through from a less significant bit position (at least one input is a '1'), a carry is generated in that bit position (both inputs are '1'), or if a carry is killed in that bit position (both inputs are '0'). In most cases, P is the xor of A and B for that bit position and G is the and of A and B for that bit position, so a half adder can be used to generate the P and G signals. After P and G are generated the carries for every bit position are generated. There are many schemes for generating these carries, such as the carry lookahead adder, Manchester carry chain, carry bypass adder, carry select adder, or Brent-Kung adder. Generally as the speed of carry generation increases, the complexity and circuit area also increases. After the carries are all generated, it is a trivial issue to generate the sum bits for every bit position.